Memory architecture - PDFSEARCH.IO - Document Search Engine

Memory architecture
Results: 1714

#	Item
821	Design Note: Target Considerations for Coldfire † Jonathan S. Shapiro, Ph.D. The EROS Group, LLC Dec 1, 2007 Abstract Add to Reading List Source URL: www.coyotos.org Language: English - Date: 2014-08-13 02:10:11 Virtual memory Computing Computer memory CPU cache Cache Page table Page Microkernel Kernel Computer architecture Central processing unit Computer hardware
822	Scalable Cache Miss Handling for High Memory-Level Parallelism Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2006-10-02 23:12:53 Central processing unit Microprocessors Computer memory CPU cache Cache Runahead Multi-core processor Microarchitecture Memory-level parallelism Computer hardware Computer architecture Computing
823	BulkCommit: Scalable and Fast Commit of Atomic Blocks in a Lazy Multiprocessor Environment Xuehai Qian, Benjamin Sahelices Josep Torrellas, Depei Qian Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2014-02-19 00:20:13 Cache Central processing unit Computer memory C dynamic memory allocation Computer architecture Computer hardware Computing CPU cache
824	Digital Semiconductor[removed]Alpha Microprocessor Evaluation Board User’s Guide Order Number: EC–QD2UD–TE Revision/Update Information: Add to Reading List Source URL: download.majix.org Language: English - Date: 2013-01-10 05:04:11 Conventional PCI PCI configuration space PCI Express Industry Standard Architecture Expansion card Alpha 21164 Acer Laboratories Incorporated Flash memory Cell Computer hardware Computer buses Computing
825	Runnemede: an Architecture for Ubiquitous High-Performance Computing Nicholas Carter, Aditya Agrawal, Shekhar Borkar, Romain Cledat, Howard David, Dave Dunning, Joshua Fryman, Ivan Ganev, Roger A. Golliver, Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2013-03-29 16:27:00 Intel Microprocessors Computer hardware Scratchpad memory Intel Core
826	SigRace: Signature-Based Data Race Detection Abdullah Muzahid University of Illinois at Urbana-Champaign, USA Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2009-04-25 12:09:23 Central processing unit Parallel computing Concurrency control Threads Computer memory Multithreading OpenMP CPU cache Context switch Computing Concurrent computing Computer architecture
827	SGI Confidential Do Not Copy MC Chip Specification 1. Introduction Add to Reading List Source URL: download.majix.org Language: English - Date: 2013-01-10 05:04:40 Computer memory IBM PC compatibles Motherboard Direct memory access R4000 GIO Dynamic random-access memory Extended Industry Standard Architecture Industry Standard Architecture Computer hardware Computing Computer buses
828	Alpha[removed]and Alpha 21066A Microprocessors Hardware Reference Manual Order Number: EC–QC4GB–TE Revision/Update Information: Add to Reading List Source URL: download.majix.org Language: English - Date: 2013-01-10 05:03:11 Central processing unit Computer buses Computer memory Conventional PCI Interrupts DEC Alpha Alpha 21064 CPU cache PCI Express Computer hardware Computer architecture Computing
829	Alpha[removed]Microprocessor Hardware Reference Manual Order Number: EC–QP99C–TE Add to Reading List Source URL: download.majix.org Language: English - Date: 2013-01-10 05:02:14 Central processing unit Computer memory CPU cache Cache DEC Alpha PALcode Control register Alpha 21164 Alpha 21364 Computing Computer architecture Computer hardware
830	To appear in the Proceedings of the 29th Annual International Symposium on Computer Architecture (ISCA-29) May 2002 ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2009-06-11 11:28:32 Fault-tolerant computer systems Computer architecture RAID Binary arithmetic Parity Parity bit Application checkpointing CPU cache SGI Origin Computer memory Computer hardware Computing

UPDATE